This application is related to Japanese Patent Application No. 2001-064950 filed on Mar. 8, 2001, whose priority is claimed under 35 USC xc2xa7119, the disclosure of which is incorporated by reference in its entirety.
1. Field of the Invention
The present invention relates to a semiconductor device, more particularly, a semiconductor device having a semiconductor substrate on which a silicon germanium film, a carbon-containing silicon film and a silicon film are formed.
2. Description of Related Art
In recent years, for increasing the operating speed of silicon MOS transistors, techniques of producing high-electron-mobility transistors are now under active development in place of conventional transistors having Sixe2x80x94SiO2 MOS interfaces as channels. In high electron-mobility transistor techniques, hetero interfaces are formed by epitaxially growing, on a Si substrate, films of materials having different lattice constants from the lattice constant of the Si substrate with a view to taking advantage of compression or tensile distortion in a horizontal direction and/or discontinuity in a band structure in the films.
For example, as shown in FIG. 2, IEDM (International Electron Device Meeting), 1994 proposed, on page 373 thereof, a transistor wherein a SiGe film 22 having a Ge concentration gradient of 0% to 20% is formed to have a thickness of 2.1 xcexcm on a p-type Si substrate 21, a SiGe film 23 having a Ge concentration of 20% is formed to have a thickness of 0.6 xcexcm on the SiGe film 22, a Si film 24 is epitaxially grown to have a thickness of 13 nm on the SiGe film 23, and as in ordinary MOSs, a SiO2 film 25 to be a gate oxide film and a polysilicon film 26 to be a gate electrode are formed on the Si film 24. In the transistor of this structure, the thick SiGe film 22 having the concentration gradient and the SiGe film 23 having a Ge concentration of 20% are formed to reduce strained distortion, so that distortion is completely reduced on the top surface of the SiGe film 23. By forming the thin Si film 24 on the SiGe film 23, is realized the strained Si film 24. Thereby the effective electron mobility in an N-channel MOS can be improved by about 50% with respect to a non-strained Si film.
For improving the mobility in a pMOS, as shown in FIG. 3, IEDM, 1994 proposed, on page 735 thereof, a transistor wherein a SiGe film 32 having a Ge concentration of 30% and a thickness of 10 nm and a Si film 33 having a thickness of 7 nm are sequentially formed on an n-type Si substrate 31 by epitaxial growth, and further, as in ordinary MOSs, a SiO2 film 34 to be a gate oxide film and a polysilicon film 35 to be a gate electrode are formed on the Si film 33. In the transistor of this structure, the SiGe film 32 having compression distortion therein is formed under the thin Si film 33. By forming a channel in the Si film 33, can be obtained a hole mobility about 1.2 times better than a non-strained Si film.
Further, referring to FIG. 4, Japanese Unexamined Patent Publication No. HEI 10(1998)-321733 proposes, as a technique for forming both an nMOS and a pMOS simultaneously, an nMOS transistor and a pMOS transistor wherein a SiGe film 42 and a Si film 43 are sequentially formed on a Si substrate 41 with an n-well and a p-well formed therein, respectively, and further gate insulating films 44 and gate electrodes 45 are formed thereon. Here, the channel of the nMOS is formed in the strained Si film 43, and the channel of the pMOS is formed in the compressed SiGe film 42.
As shown in FIG. 5, Japanese Unexamined Patent Publication No. HEI 9(1997)-219524 proposes a transistor using a SOI (silicon on insulator) substrate in which a buried oxide film 52 and a SOI film 53 are formed on a Si substrate 51. With regard to this transistor, the SOI film 53 and the buried oxide film 52 are removed from a pMOS region in the SOI substrate, and thereafter a SiGe film 54 having a Ge concentration of 30% and a thickness of 30 nm is epitaxially grown over the resulting SOI substrate and annealed at a high temperature. Thereby distortion is reduced in the SiGe film 54 on the SOI film 53 in the nMOS region. Thereafter a Si film 55 is epitaxially grown to a thickness of about 30 nm, and further a gate insulating film and a gate electrode 57 are formed thereon. Thereby, in the nMOS, the strained Si film 55 on the SOI film 53 is used as a channel, and in the pMOS, the compressed SiGe film 54 on the Si substrate 51 is used as a channel.
Of the above-mentioned transistors, the mobility of the transistor shown in FIG. 2 is improved by forming the SiGe films 22 and 23 having sequentially raised Ge concentrations to reduce the compression distortion on the top face of the SiGe film 23 and also increasing the lattice constant to give a strong strain distortion to the Si film 24 formed thereon. However, this transistor requires the formation of the thick SiGe films 22 and 23, which results in an increase in production costs.
In the CMOS transistor shown in FIG. 4, the nMOS and the pMOS are formed to have the same construction by forming the SiGe films 42 having a Ge concentration of 25 to 50% and a thickness of 5 to 10 nm and forming the Si films 43 thereon. Accordingly, since the SiGe films 42 under the Si films 43 have the compression distortion therein, the electron mobility is not sufficiently improved, especially in the nMOS.
That is, in the CMOS, for improving the electron mobility in the nMOS, the strained Si film 43 is formed on the SiGe film 42 whose distortion is reduced. For this purpose, the thick SiGe film 42 is required to be formed to reduce distortion. However, since the channel of the pMOS and the channel of the nMOS have greatly different structures, it is difficult to produce a CMOS having high effective electron and hole mobilities at the same time.
In the transistor shown in FIG. 5, the SOI substrate is used, and in the nMOS, the thin SiGe film 54 whose distortion is reduced is formed above the buried oxide film 52. However, this transistor requires an SOI substrate, and it has the disadvantage in production since a step is formed between the nMOS and the pMOS due to the removal of the buried oxide film 52 and the SOI layer 53 from the channel region of the pMOS. Also, in the epitaxial growth, the crystallinity is impaired at the step, and therefore, it is difficult to produce a CMOS having high effective electron and hole mobility simultaneously.
The present invention provides an n-channel semiconductor device comprising a semiconductor substrate on which a silicon germanium film, a carbon-containing silicon film and a silicon film are formed in this order and a gate electrode on the semiconductor substrate with intervention of a gate oxide film, wherein a channel region of the semiconductor device is formed in the carbon-containing silicon film, i.g., wherein the carbon-containing silicon film functions as a channel region.
The present invention also provides a p-channel semiconductor device comprising a semiconductor substrate on which a silicon germanium film, a carbon-containing silicon film and a silicon film are formed in this order and a gate electrode on the semiconductor substrate with intervention of a gate oxide film, wherein a channel region of the semiconductor device is formed in the silicon germanium film, i.g., wherein the silicon germanium film functions as a channel region.
Further, the present invention provides a complementary metal-oxide semiconductor device provided with the above-described n-channel semiconductor device and the above-described p-channel semiconductor device on the same substrate.
These and other objects of the present application will become more readily apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.